Appeal No. 96-0576
Application 07/846,231
two of the resources will be accessed and canceling the remainder
of the requests based on the results of the decoding of the
address(es) as recited in Appellants’ claims. The Stinson system
is directed to allow the microprocessor 1 and the memory bank to
operate synchronously momentarily during a read or write cycle.
Stinson does not teach canceling the resources that are not
needed for the access operation as recited in Appellants’ claims.
Furthermore, we fail to find any suggestion of modifying
Stinson’s synchronous data transfer system to provide a system
having a multiplicity of resources placed in an access state
before decoding the instruction to determine the addresses to be
accessed and then later canceling this access state for the
resource not to be accessed once it is determined which resource
is to perform the access operation as recited in Appellants’
claims. The Federal Circuit states that "[t]he mere fact that
the prior art may be modified in the manner suggested by the
Examiner does not make the modification obvious unless the prior
art suggested the desirability of the modification." In re
Fritch, 972 F.2d 1260, 1266 n.14, 23 USPQ2d 1780, 1783-84 n.14
(Fed. Cir. 1992), citing In re Gordon, 733 F.2d 900, 902, 221
USPQ 1125, 1127 (Fed. Cir. 1984). "Obviousness may not be
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