Appeal No. 96-0576
Application 07/846,231
established using hindsight or in view of the teachings or
suggestions of the inventor." Para-Ordnance Mfg., 73 F.3d at
1087, 37 USPQ2d at 1239, citing W. L. Gore, 721 F.2d at 1551,
1553, 220 USPQ at 311, 312-13.
Stinson is not concerned with the problem that Appellants’
are attempting to solve. Stinson is concerned with the problem
of reducing the time to transfer data between a memory and a
microprocessor. Stinson solves this problem with an improved
memory bus by allowing for momentary synchronous operation during
a read or write operation. As pointed out on page 14 of the
brief, Appellants’s invention is concerned with the problem of
the delay due to time required to determine which resource is to
be accessed where the cycle time is driven by the amount of time
required to decode the resource address and to transition the
address resource to the access state. Because Stinson is not
concerned with improving access time for a system which must
determine which resource is to be accessed, we fail to find that
Stinson provides any reason or suggestion to modify the Stinson
momentarily synchronous bus system to the system as claimed by
Appellants.
We have not sustained the rejection of claims 1 through 9
10
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