Ex parte SWOBODA et al. - Page 11




          Appeal No. 94-3053                                                          
          Application 07/832,661                                                      



          ordinary meaning.  We must therefore give this claim language               
          its broadest reasonable interpretation.  See In re Morris,                  
          127 F.3d 1048, 1054, 44 USPQ2d 1023, 1027 (Fed. Cir. 1997);                 
          In re Zletz, 893 F.2d 319, 321, 13 USPQ2d 1320, 1322 (Fed.                  
          Cir. 1989).                                                                 
                    With respect to the above-argued claim language,                  
          Hester discloses "an on-chip condition sensor" by teaching                  
          that "support processor 26 attaches to the microprocessor 28                
          in the system under test through the LSSD scan strings 30a and              
          30b."  Col. 2, lines 32-34.  Hester also discloses a "means                 
          responsive to the recognition of said predetermined condition               
          for applying a control input to said electronic processor . .               
          . ."  More specifically, the device of Hester has                           
          "predetermined conditions" by disclosing that "[a]n                         
          instruction compare address register"                                       
          contains "the desired instruction . . . compare values."  Col.              
          3, lines 22-26.  As to the limitation of "responsive to . . .               
          for applying a control input . . .," Hester teaches that the                
          condition sensor "include[s] the ability to examine and alter               

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