Appeal No. 94-3053
Application 07/832,661
an on-chip condition sensor . . . including
. . . means for stopping said electronic
processor automatically upon occurrence of
said predetermined condition.
Hester meets the above language by teaching that the
support processor "include[s] the ability to examine and alter
registers in the system microprocessor" (col. 2, lines 59-61)
and
"control[s] and examine[s] the contents of all facilities
within the microprocessor [under test]" (col. 4, lines 6-7).
Hester performs this alter/control function by having a
"desired instruction" that is used "to enable the stop-on-
address function" of the microprocessor. Col. 3, lines 22-37;
col. 4, line 10. Thus, the claim language that Appellants
argue with respect to claim 60 is met by Hester and since
anticipation is the epitome of obviousness, In re Fracalossi,
681 F.2d 792, 794, 215 USPQ 569, 571 (CCPA 1982), we will
sustain the Examiner’s rejection of claim 60 under 35 U.S.C.
§ 103 in view of Hester.
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