Appeal No. 1997-0708
Application 08/196,618
the cache during a read/write request. However, Thacker
et al. show the timing for read and write data from a
request module to a receiving module (see fig. 3A-B and
col .7 [sic], lines 52-55). It would have been obvious
for one of ordinary skill in the data processing art at
the time the invention was made to incorporate a clock
into each of the modules for keeping track of the
requests from the module because it would improve the
system taught by Thacker et al. by keeping track of the
requests independently in each of the modules.
Appellants do not argue the "lock" limitation. We note that
the Examiner has misinterpreted the claimed "lock for
interrupting access" (emphasis added) as a clock. Therefore,
the Examiner's conclusion that it would have been obvious to
incorporate a clock does not respond to the claim limitation.
It is clear that the Examiner is referring to a clock, instead
of a lock, because the referenced text at column 7,
lines 52-55, deals with clock lines. The Examiner's finding
that figures 3A and 3B somehow deal with timing is not
understood, since "FIGS. 3A and 3B show the allocation of
address bits for two preferred embodiments of the present
invention" (col. 3, lines 8-10). Figure 3C shows clock lines
116, but this has no relevance to the claimed lock. Since the
Examiner's rejection fails to address the claimed "lock for
interrupting access," the Examiner has failed to establish a
prima facie case of obviousness for this additional reason.
- 9 -
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 Next
Last modified: November 3, 2007