Appeal No. 97-2473 Page 8
Application No. 08/264,582
Barnes does “not specifically detail that his switching
network was connected to a plurality of data ports.”
(Examiner’s Answer at 4.)
The examiner observes that Chang teaches a multi-
processing system including an interconnection switching
network for selectively interconnecting processing units and a
memory source. The examiner also observes that Ewert teaches
a plurality of processing units in which each processing unit
has a plurality of data ports and is selectively
interconnected through a switching network to a common, main
memory. (Id.)
The examiner concludes that it would have been obvious to
a person of ordinary skill in the art to combine the teachings
of Barnes and Chang or Ewert “because they all are directed to
the solutions to the problems of plural processing units and
memory source interconnection. Especially, the plural ports
and selective interconnections of Ewert and Chang et al.
[W]ould give very flexible and cheaper system to Barnes et
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