Appeal No. 97-2473 Page 13
Application No. 08/264,582
of the memory sources, Ewert does not teach connecting
register A 12 to exchange data with any memory other than the
MA1. Nor does the reference teach connecting register B 13 to
exchange data with any memory other than MB1.
The examiner cites column 3, lines 25-34, of Ewert as
teaching the limitation that the first port may access any of
the memory sources while the second port may access only a
subset thereof. (Supplemental Examiner’s Answer, ¶ 4.) The
cited portion of the reference describes “being able to
transfer data laterally ....” Col. 3, ll. 29-30. Laterally
transferring data refers to exchanging data between PPMs or
between columns in memory. Id. at 30-31. Ewert does not
permit lateral data transfer between processors and memories.
Without some indication that such transfer is feasible, one
skilled in the art would not have been motivated to employ the
reference’s switches and lateral transfer buses to couple
registers A 12 and B 13 to any memory other than MA1 and MB1,
respectively.
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