Appeal No. 2000-0806
Application No. 09/016,398
The invention relates to a ball grid array
semiconductor integrated circuit device. A semiconductor chip
(Specification, page 11, lines 1-2) having a plurality of
connection pads is mounted to the first surface of a carrier
base (Specification, page 11, lines 5-7). The connection pads
connect to conductors (specification, page 11, line 14 to page
12, line 10) contained on and penetrating through the carrier
base to the opposite surface, each connector connecting to one
of a plurality of external connection terminals
(Specification, page 12, lines 11-19) having a spherical
shape. A sealing resin layer (Specification, page 12, lines
20-25) surrounds a periphery of the chip; in some embodiments,
discrete first and second insulating adhesive layers (page 24,
lines 1-10) are disposed below and above the chip,
respectively. Along with the carrier base, a reinforcement
base (page 12, line 26 to page 13, line 9) forms a "sandwich"
of the core materials (chip, resin layer), the carrier base
and reinforcement base having the same coefficient of thermal
expansion whereby thermal stresses of the two bases in
response to temperature change are substantially equal (page
2
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