Appeal No. 1998-0077
Application No. 08/247,910
canceled.
The invention relates to a method of forming an
integrated circuit device including at least one polysilicon
resistor. A polysilicon layer is formed, possibly over a
field oxide, and then doped to a selected sheet resistance
(Specification, page 5, lines 5 through 9; Figure 2). An
insulating layer is formed over the polysilicon layer, and
patterned and etched to define a resistor body in the
underlying polysilicon layer (Specification, page 6, lines 3
through 5; Figure 3). Subsequently, the polysilicon layer is
patterned and etched to define first and second heads abutting
the resistor body, while simultaneously at least one
polysilicon element of a second electronic device (such as a
field effect transistor) is formed (Specification, page 6,
lines 6 through 8; Figure 4a). First and second resistor
contact portions are doped a second time (Specification, page
6, line 19; Figure 4a); sidewall spacers are formed along
sidewalls of the insulating layer and the resistor contacts
(Specification, page 7, lines 9 and 10; Figures 5a-5c); and
finally, silicide regions are formed on the resistor contacts
2
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