Appeal No. 2002-0374 Page 6
Application No. 08/599,227
Supnik, the examiner turns to each of Lucente or Rastegar. The
examiner asserts (answer, page 6) that "Rastegar teaches that it is
known to provide a redundant rows [sic] for any particular memory
device in which they can be programmed to substitute for array rows
containing non-functional bits or defective [bits]." The examiner
further asserts (id.) that "Rastegar further teaches . . . [that]
the redundant memory is capable of being mapped to any location on
the device which contains non-functional memory cells, and
incorporating it into the device [of Supnik] should not add
complexity to the overall device design." With regard to Lucente,
the examiner's position is that Lucente teaches that a cache memory
could be modified to provide memory-word redundancy, thereby
increasing system reliability as well as throughput. The examiner
maintains (id.) that it would have been obvious to include
redundant cache lines as they can be substituted for the cache
arrays or cache lines which contain non-functional or defective
data.
Appellants (brief, page 4) does not dispute that it is well
known in the prior art that redundant rows or columns may be
substituted for defective rows or columns. Appellants assert (id.)
that a premise upon which the invention is based on redundant
columns or rows exists and that frequently, not all of the
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