Appeal No. 2002-0374 Page 9 Application No. 08/599,227 setting a defect bit to prevent further use of the memory location. Turning to Lucente (page 404) we find that Lucente discloses that "[t]his device isolates hard errors in system memory by writing a true and complement[ary] pattern to each system memory location. Locations from an on-chip associative cache are then mapped into the address space in place of the faulty locations.” When a faulty system memory location is located during system testing, its address is placed in the address tag of one cache location. The location of the failed bit or bits is also stored. All accesses calling for the faulty location will now be directed to the replacement cache location the architecture of Lucente (page 408) is implemented in a Memory Reliability Enhancement Peripheral (MREP) device. The MREP provides redundancy at a system level by using its on-chip cache to replace failed words anywhere in the memory system. In addition (id.) "[a]s each failed memory location is detected, a cache location replaces it." Thus, from the disclosure of Lucente, we find that Lucente replaces defective bits by replacing them with a location in cache, and does not disclose the provision of unmapped cache locations which can be used as temporary cache without displacing or overwriting portions of the memory.Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 NextLast modified: November 3, 2007