Appeal No. 2002-0374 Page 12
Application No. 08/599,227
in the record, and to be the result of using appellants' invention
as a template, in a hindsight reconstruction of appellants'
invention. We note again the statement in Rastegar (col. 9, lines
25-30) that enough spare rows or columns should be provided to
replace all of the rows containing bad bits, but that it is
undesirable to provide too many redundant rows. If Rastegar
disclosed the use of redundant rows as redundant unmapped cache
locations, Rastegar would have been motivated to provide as many
redundant rows as possible to increase the useable size of the
cache memory. We find no teaching or suggestion in Rastegar, and
no portion of Rastegar has been pointed to by the examiner, which
would suggest using the redundant memory as temporary cache
locations, resulting in the utilization of the redundant memory as
redundant unmapped cache lines.
We agree with the examiner that the redundant memory of
Rastegar could be used as redundant unmapped cache lines, but find
no teaching or motivation to have done so. Similarly, with respect
to Lucente, because Lucente discloses replacing failed memory
locations with memory from the cache, we find no suggestion of
using the cache memory as redundant unmapped cache lines which are
used as temporary cache without displacing or overwriting any of
the lines of memory. From all of the above, we find that the
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