Appeal No. 2005-0323 Page 11
Application No. 09/577,835
current, a prior art method has suggested forming a metal
silicide layer on the gate electrode and the source/drain
diffusion regions, to reduce parasitic resistance. However,
since the metal silicide layer on the gate electrode is as high
as the sidewall insulating layer formed on the sidewall of the
gate electrode, if the metal silicide layer is extremely grown, a
short circuit may occur between the gate electrode and the
source/drain regions (col. 1, lines 13-36). We find the teaching
of the metal silicide layer being extremely grown to mean that
the metal silicide layer is grown to a point that it extends
above the top of the sidewall insulating layer formed on a
sidewall of the gate electrode.
Mogami further discloses (col. 1, lines 37-63) that “the
height of the metal silicide layer on the gate electrode layer is
smaller than that of the sidewall insulating layer, so that the
gate electrode layer is electrically isolated from the
source/drain regions. Thus, no short circuit may be generated
between the gate electrode layer and the source/drain regions.”
From Mogami's disclosure that it was known to make the height of
the silicide layer smaller than the height of the sidewall
insulating layer to prevent short circuiting between the gate
electrode and the source/drain regions, we find that in Gardner,
Page: Previous 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Next
Last modified: November 3, 2007