Appeal No. 2005-0323 Page 13
Application No. 09/577,835
likelihood of bridging between the gate conductor and the
source/drain regions, we find from Mogami that if the top of the
silicide layer is above the top of the sidewall spacers, that
short circuiting can occur. In view of Mogami's recognition of
this problem and disclosure of having the sidewall spacers above
the top of the gate stack to prevent short circuiting, we find
that an artisan would have been motivated to combine the
teachings of Gardner and Mogami as advanced by the examiner.
From all of the above, we are not convinced of any error on the
part of the examiner, and find that the teachings of Gardner and
Mogami suggest the language of claims 25-27 and 30. Accordingly,
the rejection of claims 25-27 and 30 under 35 U.S.C. § 103(a) is
affirmed.
We turn next to claim 28. The examiner's position (answer,
pages 4 and 5) is that Gardner and Mogami do “not teach that the
silicide layer is a refractory metal silicide layer and a
diffusion barrier layer formed between the polysilicon layer and
the silicide layer.” To overcome this deficiency in Gardner and
Mogami, the examiner turns to Bai for a teaching of "a
semiconductor device comprising: a gate stack (222) including a
polysilicon layer (204), a conductive diffusion barrier layer
(206, a TiN layer) on the polysilicon layer and a refractory
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