Ex Parte 5872952 et al - Page 40




              Appeal No. 2005-2512                                                                                         
              Reexamination Control No. 90/006,431                                                                         

              ChipViewer was then released as the Arcadia product.”  Second Ho Decl. para. 2.                              
              Kroger is inapposite because the Arcadia Manual does not contradict Ho’s testimony                           
              that he and Tuan invented RailMill and the use of ChipViewer to display the RailMill                         
              outputs.                                                                                                     
                     Our holding that Ho’s testimony is sufficient to remove the Arcadia Manual only                       
              to the extent it discloses the RailMill power net simulation engine and associated                           
              transistor network simulation engine and the use of ChipViewer to display the RailMill                       
              output information means that the Arcadia Manual is still prior art under § 102(a) in all                    
              other respects, including its disclosure of using ChipViewer with simulators other than                      
              RailMill, namely, SPICE, PowerMill, and TimeMill.  Because Ho’s declaration fails to                         
              explain which display features of ChipViewer, if any, were invented by him and Tuan in                       
              order to display the RailMill outputs, we must assume that they not invent any of the                        
              following ChipViewer features described at page 1-3 and reproduced below, which are                          
              not described therein as limited to RailMill:                                                                
                     ·     Graphical point-and-click operation                                                             
                     ·     Visual navigation through the layout to explore any area of the chip layout                     
                     ·     Full zoom and pan capability                                                                    
                     ·     Numerical evaluation of the details of a selected net by extracting accurate                    
              interconnect model parameters                                                                                
                     ·     Analyze model parameters using a time domain simulator                                          
              Arcadia Manual at p. 1-3 (emphasis added).  Treating these ChipViewer display                                
              features as not limited to RailMill is also consistent with the ‘580 patent, filed November                  
              8, 1994, on which (as noted above) the examiner unsuccessfully relied to attribute that                      

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