Appeal 2006-1454
Application 09/004,524
Patent 5,483,421
34. A method of mounting integrated circuit chips onto a circuit board
comprising the steps of:
providing an integrated circuit chip having a surface array of input/output
pads on one side thereof which array forms a footprint;
providing a chip carrier formed of an organic dielectric material having first
and second opposite surfaces;
forming a first set of bonding pads on said first surface of the chip carrier
arranged in an array corresponding with the chip footprint;
providing a pattern of conductors on said chip carrier connected to
accommodate said input/output pads;
forming a first set of solder connections between the input/output pads on
the chip and said first set of bonding pads on the chip carrier;
encapsulating said first set of solder connections;
forming a second set of bonding pads on the second surface of the chip
carrier arranged in an array;
forming electrically conducting vias through the chip carrier to connect said
first set of bonding pads to the second set of bonding pads;
providing a circuit board formed of an organic material having a coefficient
of thermal expansion similar to the chip carrier;
forming a set of electrical connection sites on said circuit board arranged in a
pattern corresponding to the pattern of the array of the second bonding pads on
said chip carrier;
forming a second set of solder connections between the pads of said second
set of bonding pads on the chip carrier and the connection sites on the circuit
board; and
forming wiring on said circuit board connected to said second set of bonding
pads.
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