Appeal No. 2006-2832
Application No. 09/833,953
whenever possible by, for example, eliminating steps or finding compatible
processes” (Specification, page 3). Thus, the claimed invention addresses forming
a field effect transistor (FET) on a silicon wafer concurrently with the formation of
resistors used in the circuitry with that transistor. The cited reference Zaccherini
teaches a method for forming a FET on a layer of polycrystalline silicon (region 4)
along with resistors (8) formed with the same layer in a method hauntingly similar
to the claimed method. Erdeljac teaches forming a FET (50) and a few resistors
(20, 32 and 34) on a common silicon wafer in which a N-well is employed, and
Shao teaches forming a FET (40) and resistor (38) and employing a blocking layer
for the resistor. All references express an objective of simplifying the process and
reducing costs.
In the recent case In re Kahn, 441 F.3d 977, 985, 78 USPQ2d 1329, 1335
(Fed. Cir. 2006), the Board was guided:
“… to establish a prima facie case of obviousness based on a
combination of elements disclosed in the prior art, the Board must
articulate the basis on which it concludes that it would have been
obvious to make the claimed invention. Id. [Graham v. John Deere
Co., 383 U.S. 1, 13-14 [148 USPQ 459] (1966)] In practice, this
requires that the Board “explain the reasons one of ordinary skill in
the art would have been motivated to select the references and to
combine them to render the claimed invention obvious.” Id. at 1357-
59.
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