Ex parte NISHIMURA et al. - Page 2




            Appeal No. 1997-2983                                                    Page 2               
            Application No. 08/482,792                                                                   


            SDBUS is used to transfer context data saved from or restored                                
            to a register set (RF), program counter (PC), and processor                                  
            status word (PSW). When a currently executing program is                                     
            interrupted by a program to be executed, context data                                        
            representing the instant execution status of the currently                                   
            executing program (e.g., the contents of PC and PSW) are                                     
            transferred from a central processing unit (CPU) to an                                       
            external memory via the SDBUS and BABUS.  Context data for                                   
            program to be executed are then transferred via the SDBUS and                                
            BABUS to replace the previous context data.                                                  


                  Claims 6 and 13, which are representative for our                                      
            purposes, follow:                                                                            
                        6.    A single chip microcomputer comprising:                                    
                              (a) a central processing unit (CPU) for                                    
                  processing programs, said CPU comprising a Processor                                   
                  Status Word Register, a Program Counter Register,                                      
                  and a General Purpose Register Set;                                                    
                              (b) an on-chip RAM;                                                        
                              (c) an on-chip ROM;                                                        
                              (d) a first bus for connecting said CPU,                                   
                  RAM and ROM with one another and passing data                                          
                  between them;                                                                          








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