Appeal No. 1998-1365 Page 10
Application No. 08/663,969
of cycles of the phase increment signal received during each
received cycle of the remote clock signal, Marshall counts a
number of cycles of the phase increment signal occurring in a
predetermined period of time.
Vanderspool also teaches determining alignment between a
clock signal and a reference clock signal. Specifically, a
“divider 725 provides a sample clock ....” Col. 7, l. 60.
“[A] time-mark pulse, i.e., a one pulse-per-second (1PPS)
signal, could be used to ensure that the sample rate clock is
aligned to the time-mark.” Id. at ll. 10-13. “A phase
comparator and offset quantifier 717 receives at its inputs
... the sample clock and the 1PPS signal.” Id. at ll. 62-64.
The phase comparator and offset quantifier “compar[es] the
time-mark signal and the sample clock signal to generate a
correction signal indicating a direction of phase error. The
correction signal has a duration ... for further indicating a
magnitude of the phase error ....” Col. 4, ll. 9-18. By
generating a correction signal indicating the phase error
between the sample clock and the 1PPS signal, the reference
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