Appeal No. 1999-2683
Application 08/754,564
time to etch a given thickness, to accommodate variable
thickness and etch rate non-uniformity to ensure complete
removal of material (Br6) and since oxide layer 24 in Tsu
is not specified to be an etch stop, it would not have an etch
selectivity high enough to remain unaffected during via
overetch (Br8).
Analysis
The problem of oxide overetch in making borderless
(unframed) contacts or vias was known in the prior art, as was
the general solution of using "etch stop" dielectrics to
prevent the etching from undercutting the underlying metal
pattern. See Pimbley et al., VLSI Electronics Microstructure
Science - Vol. 19,(Academic Press, Inc. 1989), pp. 74, 95;
Jang et al., U.S. Patent 5,840,624, issued November 24, 1998,
filed March 15, 1996 (copies attached). The secondary
reference to Kalnitsky addresses the problem of overetching
and is arguably a much stronger reference than Tsu. However,
the Examiner has elected to use as a primary reference the Tsu
patent which does not address the problems of misaligned vias
or overetching. We address the rejection as stated by the
Examiner, rather than some rejection we could create out of
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