Appeal No. 1999-1098
Application 08/627,313
reason why one having ordinary skill in the art would have
been motivated to modify prior art figures 16-17 in view of
Kusunoki and Seefeldt to arrive at the claimed invention.
The Examiner asserts that prior art figures 16 and 178
teach all the claimed structure except for the word lines and
bit lines, and that Kusunoki teaches word and bit lines. The
Examiner then cites Seefeldt as teaching I/O peripheral
circuits intermingled with gate memory blocks wherein the I/O
peripheral circuits reside at the center of radially formed
blocks. The Examiner then finds "It would have been obvious
to a skilled artisan to apply the teachings of Kusunoki and
Seefeldt as a simple design choice for arrangement of the
cells and periphery therein."
In regard to Appellants' argument that the openings shown
in prior art figures 16-17 do not meet the "completely
surrounded" limitation, the Examiner asserts that the 9
openings are merely block diagram illustrations from one
memory cell array to the next. The Examiner further asserts
8Answer, page 4
9Answer, page 7
9
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