Appeal No. 1999-1098
Application 08/627,313
that these figures are no different from the cover figure of
Kusunoki which shows no spacing between the arrays, and that
when looking at a real layout, such as figures 9-11, the
spacing is made as small as possible (Examiner's emphasis) in
accordance with known semiconductor design rules.
In addition, the Examiner asserts that the claim 10
language "completely surrounded" is met by the block diagram
shown in figure 17, as memory cells reside at all sides around
the peripheral circuit and thus surround the peripheral
circuit. The Examiner further states "in the Examiner's
opinion, wiring layers also comprise the memory circuits and
since wiring layers traverse the "gaps," the peripheral
circuit is clearly "completely surrounded."
Finally, the Examiner refers to Seefeldt as showing I/O11
cells, or peripheral cells, at the center of other circuitry.
As pointed out by our reviewing court, we must first
determine the scope of the claim. "[T]he name of the game is
10Answer, page 7
11Answer page 8
10
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