Appeal No. 1999-1098
Application 08/627,313
surround I/O cells with gate cells, but to interdisperse the
cells. Appellants' invention requires that the memory blocks
surround the peripheral circuit in order to provide
substantially equal signal delay between the peripheral
circuit and the respective memory blocks.
Finally, we find in the Examiner's conclusion that it
would have been obvious to a skilled artisan to apply the
teachings of Kusunoki and Seefeldt as a simple design choice
for arrangement of the cells and periphery, to be without
evidentiary basis. As Appellants' specification clearly
presents the reason for the claimed arrangement, i.e., to15
reduce unequal signal delays due to different path lengths,
the Examiner must provide evidence why one of ordinary skill
in this art would have selected the claimed arrangement of
memory blocks and peripheral circuits.
Similarly, as regards claim 8, the Examiner finds "It 16
would have been obvious to a skilled artisan to apply the
teachings of Kusunoki and Seefeldt as a simple design choice
15Page 14, lines 14-17
16Answer, page 4
13
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