Appeal No. 95-3658
Application 07/777,877
Claims 2-7, 10, and 16
Claims 2-7 require an "array built in self test (ABIST) system disposed on a single semiconductor
chip" (emphasis added) and claims 10 and 16 require a "built in self test system formed on a semiconductor
chip" (emphasis added). These limitations require all the structure recited in these claims to be disposed
on the chip. Harns is not an ABIST system on the same chip as the device to be tested and the examiner
has not cited an ABIST reference. The examiner's only motivation for putting the test system of Harns on
the chip is that changes in semiconductor technology allow a designer to put more circuitry on a chip
(Examiner's Answer, page 3). We agree with appellants' arguments (Brief, page 10) that there is no logical
motivation to put the test system of Harns on the same chip as the memory device because that would
require putting a BFRAM as large as the memory under test on the chip, doubling the size of the memory
just for the test circuitry. Furthermore, because the BFRAM would not have been tested it would be
unsuitable for use as part of a testing system, that is, the BFRAM memory would have to be tested before
the memory array itself could be tested. "The mere fact that the prior art may be modified in the manner
suggested by the Examiner does not make the modification obvious unless the prior art suggested the
desirability of the modification." In re Fritch, 972 F.2d 1260, 1266, 23 USPQ2d 1780, 1783-84 (Fed.
Cir. 1982), citing In re Gordon, 733 F.2d 900, 902, 221 USPQ 1125, 1127 (Fed. Cir. 1984). There is
no suggestion in the applied references for putting the test circuitry on the same chip as the memory array.
Nor would putting the circuitry on the same chip produce a practical device. Accordingly, the rejection
of claims 2-7, 10, and 16 is reversed.
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