Appeal No. 96-1426
Application 08/001,863
ALU, where the inputs AI0, AI1, and AI2 are shown in figures 7A,
7B.
Vassiliadis describes that "[a]ddress generation can also be
affected by data hazards which will be referred to as address
hazards, AHAZ" (column 15, approx. lines 42-44). Address
instructions can have two source operands, e.g., R1 and R5 in the
instruction S R3, D(R1,R5) (column 15, line 55). The data
dependencies in pairs of instructions which include an address
instruction can be collapsed following similar procedures to
those described above for pairs of logical and arithmetic
instructions. Vassiliadis states (column 15, line 64 to
column 16, line 2):
For an interlock collapsing ALU, new operations arising
from collapsing AHAZ interlocks must be derived by analyzing
all combinations of instruction sequences and address
operand conflicts. Analysis indicates that common
interlocks, such as the ones contained in the above
instruction sequences, can be collapsed with a
four-to-one ALU.
Vassiliadis also discloses a branch hazard-collapsing ALU
(column 17, lines 1-45).
It is not clear whether the examiner believes that
Vassiliadis is doing the same thing as the claimed invention or
only finds that the claims, as presented, happen to read on
Vassiliadis. To start with, the examiner finds that "Vassiliadis
- 6 -
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 Next
Last modified: November 3, 2007