Ex parte KAHLE et al. - Page 7

        Appeal No. 96-1426                                                              
        Application 08/001,863                                                          

        taught the invention as claimed including a data dependency                     
        collapsing hardware system for scheduling" (Examiner's Answer,                  
        page 2).  The examiner does not explain what the "collapsing                    
        hardware" has to do with the claimed subject matter and                         
        apparently  misapprehends  how  Vassiliadis  works.    While                    
        Vassiliadis  does  address  the  problem  of  data  dependency                  
        interlocks in superscalar machines, the approach is completely                  
        different than that recited in the claims.  Vassiliadis                         
        eliminates interlocks between two instructions by collapsing the                
        data  dependency  between  the  instructions  by  concurrently                  
        executing the instructions using a special ALU having provision                 
        for receiving three operands which are used by the first and                    
        second instructions or, for address hazards, using an ALU having                
        four operand inputs.  The data dependency collapsing ALU in                     
        Vassiliadis is not "source-to-destination dependency interlock                  
        circuitry" as claimed because it does not interlock instructions,               
        i.e., it does not block or delay dispatch of an instruction until               
        a result from a preceding instruction which is necessary for                    
        correct execution has been obtained, causing the instructions to                
        execute serially.  The collapsing ALU eliminates interlocks                     
        between instructions by concurrent execution of pairs of                        
        instructions which have possible data dependencies using a                      

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