Appeal No. 96-1014
Application 08/032,530
processors c and d are synchronized (to each other and not
to processors a and b) at time t . Where a group of
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processors is synchronized, they start and end the task at
the same time; e.g., processors a, b, and d are synchronized
at time t and end the task at time t . Thus, Kametani is5 6
not inconsistent with the task being a single instruction.
As to the limitations of inhibiting the fetching of the
next instruction until a ready signal is received from each
processor to be synchronized and then fetching and executing
the next instruction, Kametani admittedly does not expressly
disclose that this is what happens or that a program counter
is used. Kametani describes that processing by the
processor is interrupted until the TEST input becomes "0" in
response to all the processors to be synchronized having
indicated that they have ended their task and are ready to
be synchronized, whereupon the processor starts processing
again (col. 2, line 65 to col. 3, line 1; col. 3,
lines 16-25). Impliedly, the processor starts processing by
fetching and then executing the next instruction. The
examiner finds that program counters are inherent in
computers and that Kametani's interruption and continuation
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