Appeal No. 2001-2659
Application 08/919,674
lines 19-33).
Thus, the method claimed in the appellant’s claim 10 differs
from Kume’s method only in that Kume’s oxide layers (18) and (20)
of the second gate insulating layer (18, 19, 20) are formed by
thermal oxidation rather than by chemical vapor deposition.
Because of this difference, however, Kume does not anticipate the
claimed method. Consequently, we reverse the rejection of
claim 10 and claim 11 which depends therefrom.
Claim 12
The first 8 steps of claim 12 are addressed in steps 1-7 of
the above discussion of claim 10. Kume also discloses the steps
of:
8) depositing a third polysilicon layer (28) onto the entire
surface so as to form a gate electrode of a peripheral circuit
transistor (figure 12; col. 11, lines 66-68);
9) removing, by means of an etching process, the third
polysilicon layer (28) of the memory cell array region and the
silicon oxide layer (27') formed on the surface of the second
polysilicon layer (21) (figure 12; col. 11, lines 7-15; col. 12,
lines 1-3);
10) depositing a WSi layer (40) over the entire surface
(figure 12; col. 12, lines 4-7); and
9
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