Ex Parte 4918645 et al - Page 33




         Appeal No. 2006-2217                                                       
         Reexamination Control Nos. 90/006,789 and 90/007,420                       

         and performance constraints that differ radically from the                 
         general purpose systems described in "286/100" and                         
         "2164A" (Br48-50).  It is argued (Br49):                                   
                   Bruce discusses a method for page boundary detection             
              that is specific to a graphics system for raster display              
              refresh.  Bruce at col. 1:7-10.  In fact, Bruce explicitly            
              teaches away from considering page mode memory access in              
              graphics/raster display applications generally, explaining:           
                   [P]age mode has not heretofore been considered useful            
                   in raster display refresh memory systems because of the          
                   low probability that memory locations which need to be           
                   accessed sequentially by the graphics computation                
                   device will fall on the same "page" since the "page"             
                   extends only in one dimension of the display memory.             
              Id. at col. 2:17-24.                                                  
              A reference is analogous prior art if it is in the field of           
         the inventor's endeavor or reasonably pertinent to the particular          
         problem with which the inventor was concerned.  See                        
         Deminski, 796 F.2d at 442, 230 USPQ at 315.  The scope of the              
         prior art is a finding of fact.  The field of inventor's endeavor          
         is memory controllers for "page mode" access of DRAMs in a system          
         having "requesting agents and "replying agents" connected to a             
         "system bus," in particular, a Multibus II system.  Bruce                  
         describes memory controllers for page mode DRAMs (e.g., Fig. 3)            
         and is within the inventor's field of endeavor.  The particular            
         problem the inventor was concerned with in claims 6 and 17 was             
         crossing a page (row) boundary during a page mode of operation.            
         Bruce discloses apparatus for detecting and crossing a page                
         boundary in "page mode" memory accesses as part of its overall             
         invention and thus addresses the same problem facing the                   
         inventor.  Bruce teaches the same solution recited in claims 6             
         and 17.  Bruce is within the scope of the prior art.                       
              Bruce does not state that the method for page boundary                
         detection and crossing is limited to the disclosed graphics                
         system.  The page boundary detection and crossing technique                
         described as a general technique (see col. 3, lines 29-51) and             
         can be applied to any page mode memory system.  Bruce's statement          
         that page mode has not been considered to be useful in raster              
         display memory systems does not constitute a teaching away from            
         the use of the page mode, in general.  Bruce teaches that the              
         page mode has the advantage of allowing memory locations on the            
         same page to be accessed at a significantly higher speed than a            
         normal access to an arbitrary memory location (col. 2, lines               
         12-17), which is motivation for using a page mode.  Bruce also             
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