Appeal No. 1997-3818
Application 08/208,517
Bowater discloses a dynamic memory controller
operable with dynamic RAMs having a wide range of operating
characteristics (col. 3, lines 9-11). Bowater explains (col.
4, lines 33-44) that his invention
allows the speed parameters and style to be
individually programmed based on two factors:
1. The bank of memory being accessed--several
different banks of memory can be controlled
by the same memory controller (some could
be video RAM, some could be static column
mode, etc.), and the memory accesses are
modified for each bank in order to maintain
optimum performance.
2. The source of the memory request--different
sources of the request can also influence
the access (such as requiring extra data
hold time which effectively increases the
CAS access time).
Referring to Figure 3, a memory controller 110 for controlling
DRAM banks 120 and 121 and VRAM banks 122 and 123 is
responsive to memory requests generated by microprocessor 100
and other sources 101-104. Referring to Figure 4, which shows
the internal components of memory controller 110, these
memory requests are applied to request prioritization and
address selection logic 200. The types of memory to be
controlled are provided to state machine configuration
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