Appeal No. 1997-3818
Application 08/208,517
registers 230 by the microprocessor: "The registers 230
respond to the signal inputs from microprocessor 100 which are
indicative of the source of the memory request and the type
of memory bank accessed, to change the contents of the
registers" (col. 8, lines 26-29). The control store 240
responds to the contents of the register 230 to change the
duration of the cycle time of the control signals applied to
the selected memory bank (col. 8, lines 29-32). Specifically,
the access time and precharge time of RAS and CAS are modified
(col. 8, lines 32-34). The examiner concedes that "Bowater
does not teach auto-detecting the type of memory by polling
data from a predetermined feedback line of the memory module
(or memory port)" (Answer at 5). For this teaching the
examiner relies on Grants.
Grants discloses a memory control circuit which
"includes a decoder circuit which connects to selected leads
in the machine's address bus and which connects to size
feedback lines that connect to the memory modules and which
indicate to the decoder circuit the size of the memory modules
being used" (col. 1, lines 43-49). Referring to Figure 2A,
10
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