Ex parte SIMPSON et al. - Page 14




          Appeal No. 1997-3818                                                        
          Application 08/208,517                                                      



          (Fig. 3).  We note that appel- lants, in responding to the                  
          now-withdrawn § 112 rejection, concede that                                 
                    the technique of sampling inputs at a                             
                    predetermined time as recited in claims 1,                        
                    11, 19 and 28 is well known in the art.  It                       
                    is known in the art to capture the state of                       
                    a particular input at a particular time for                       
                    use.  The Appellants respectfully submit                          
                    that this technique is so well known in the                       
                    art that it does not require further                              
                    elaboration here.  [Brief at 6.]                                  
                    As for point (b), i.e., sampling the inputs "at a                 
          predetermined time in a memory cycle," appellants do not                    
          argue, and we do not believe, that the phrase "a memory cycle"              
          must be construed to mean "every memory cycle."  Thus, the                  
          limitation at issue, when broadly construed, is broad enough                
          to read on sampling the memory size signals in Bowater as                   
          modified above during a single memory cycle.  Appellants have               
          not explained why it would have been unobvious from Grants,                 
          which discloses sampling during every memory cycle, to sample               
          the memory size inputs at a predetermined time in at least one              
          memory cycle.                                                               




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