Appeal No. 1999-2256 Page 8
Application No. 08/686,477
the clock signal thereto. To the contrary, Figure 24 of the
reference shows that the clock signal 2905 continues to be
applied to the binary counter’s CLK terminal.
Relying on Loftis to allegedly “disclose[s] a ‘bus
permission signal,’” (Examiner’s Answer at 4), and Carr to
disclose “two NOR gates configured as a flip-flop,” (id. at
8), the examiner fails to allege, let alone show, that the
additional reference cures the defect of Mager. Because the
latter reference’s clock signal is applied to its binary
counter even in the state of indefinite reset, we are not
persuaded that the teachings from the applied prior art would
have suggested the limitations of “count clock control means
for receiving said count clock signal transmitted from a
second external device and transmitting said count clock
signal to said watch dog timer means, and for halting a
transmission of said count clock signal transmitted from an
external device to said watch dog timer means when said CPU
transmits a bus permission signal to said DMAC for using said
bus by said DMAC,” “count clock control means for receiving
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