Appeal No. 2006-2217
Reexamination Control Nos. 90/006,789 and 90/007,420
Interfacing Dynamic RAM to iAPX 86, 88 Systems Using the
Intel 8202A and 8204, Application Note AP-97A, Intel Corp.,
April 1982, pages 3-110 to 3-145 ("AP-97A").
51C64H High Performance Ripplemode™ 64K x 1 CHMOS Dynamic
RAM, Intel Corp., pages 2-1 to 2-20, June 1984 ("51C64H").
iSBC® MEM/312/310/320/340 Memory Boards User's Guide,
Intel Corp., February 1985 ("iSBC MEM/3XX").
Claims 1, 6, 12, and 17 are rejected under 35 U.S.C.
§ 103(a) as unpatentable over "Multibus II," "82C08," "51C64H,"
and Bruce. "iSBC MEM/3xx" are applied as evidence of the level
of ordinary skill in the art.
Obviousness
Factual findings
Scope and content of the prior art
Scope
The "scope" of the prior art relates to whether references
are from analogous art. See In re Deminski, 796 F.2d 436, 442,
230 USPQ 313, 315 (Fed. Cir. 1986) (the reference must either be
in the field of the applicant's endeavor or, if not, then be
reasonably pertinent to the particular problem with which the
inventor was concerned); Stratoflex, Inc. v. Aeroquip Corp.,
713 F.2d 1530, 1535, 218 USPQ 871, 876 (Fed. Cir. 1983) ("The
scope of the prior art has been defined as that 'reasonably
pertinent to the particular problem with which the inventor was
involved'.").
The field of inventor's endeavor is memory controllers for
"page mode" access of DRAMs in a system having "requesting agents
and "replying agents" connected to a "system bus," in particular,
the Multibus II standard. "Multibus II" and "iSBC MEM/3XX" both
relate to memory access in the Multibus II system and are within
the field of endeavor. "82C08" relates to a memory controller
with "page mode" and "51C64H" is a DRAM with page mode, which can
be controlled by "82C08"; thus, both are within the field of
endeavor.
Patent Owner argues in connection with the examiner's
rejection that Bruce is nonanalogous art (and, therefore, not
within the scope of the prior art) (Br48-50). These arguments
are addressed in detail in connection with the rejection of
claims 6 and 17. However, the short answer is that Bruce
discloses apparatus for detecting and crossing a page boundary
in "page mode" memory accesses and is at least reasonably
pertinent to the same problem facing the inventor. The apparatus
is, in fact, identical. Since Bruce also describes memory
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