Appeal No. 96-0511
Application 08/158,837
by preliminary row decoder 203b is first activated by
preliminary word driver 204b, so that storage data of all
the memory cells connected to the selected word line
appear on corresponding bit line pairs. When normal row
encoder 203b [sic, 203a] is then enabled, the normal word
line selected by normal row encoder 203[a] is activated
by normal word driver 204a. Accordingly, the storage
data of all the memory cells connected to the selected
spare word line are written into all the memory cells
connected to the selected normal word line through their
corresponding bit line pairs. Conversely, if normal row
decoder 203[a] is first enabled, the normal word line
selected by normal row decoder 203a is first activated by
normal word driver 204a, and subsequently the spare word
line selected by preliminary row decoder 203b is
activated by preliminary word driver 204b. Thus, the
storage data of all the memory cells connected to the
selected normal word line appear on their corresponding
bit lines during a period in which normal row decoder
203b is activated, and then written into all the memory
cells connected to the selected spare word line. [Spec.
at p. 26, line 2 to p. 27, line 2.]
As a result, once a test data pattern has been written
(presumably serially) into a row of the preliminary memory or
the normal memory, the entire row of test data can be
simultaneously transferred to a selected row of the other
memory (Spec. at p. 51, line 7 to p. 52, line 14; p. 59, lines
5-21).
Figure 10 shows the details of testing circuit 209, which
appears in block form in Figure 1. Externally generated test
data from I/O control circuit 206 (identified as 206b in Fig.
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Last modified: November 3, 2007